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|Item Numbe:||W971GG6JB-18||Products Category:||Memory & Flash Memory|
|Storage Capacity:||1G-Bit( 64Mx16)||Frequency:||200MHz|
|VOLT:||1.8V||Technology:||SDRAM - DDR2|
|Temp.:||0°C ~ 85°C（TC)||Package:||BGA84|
nand type flash memory,
flash memory controller chip
Flash Memory Chip W971GG6JB-18 , IC SDRAM DDR2 64Mx16 Memory chip BGA84
The W971GG6JB is a 1G bits DDR2 SDRAM, organized as 8,388,608 words x 8 banks x 16 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for various applications. W971GG6JB is sorted into the following grade parts: -18, -25, 25L, 25I, 25A, 25K and -3. The -18 grade parts is compliant to the DDR2-1066 (6-6-6) specification. The -25/25L/25I/25A/25K grade parts are compliant to the DDR2-800 (5-5-5) specification (the 25L grade parts is guaranteed to support IDD2P = 7 mA and IDD6 = 4 mA at commercial temperature, the 25I industrial grade parts is guaranteed to support -40°C ≤ TCASE ≤ 95°C). The -3 grade parts is compliant to the DDR2-667 (5-5-5) specification.
The automotive grade parts temperature, if offered, has two simultaneous requirements: ambient temperature (TA) surrounding the device cannot be less than -40°C or greater than +95°C (for 25A), +105°C (for 25K), and the case temperature (TCASE) cannot be less than -40°C or greater than +95°C (for 25A), +105°C (for 25K). JEDEC specifications require the refresh rate to double when TCASE exceeds +85°C; this also requires use of the high-temperature self refresh option. Additionally, ODT resistance and the input/output impedance must be derated when TCASE is < 0°C or > +85°C.
All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CLK rising and NOT CLK falling). All I/Os are synchronized with a single ended DQS or differential DQS- NOT DQS pair in a source synchronous fashion.
Contact Person: Karen.