| Processorl NO.: | I7-4510U | Produce Collection: | The 4th Core I7 Series Processor |
|---|---|---|---|
| Code Name: | Products Formerly Haswell | Vertical Segment: | Mobile |
| Status: | Launched | Launch Date: | Q2'14 |
| Lithography: | 22nm | Use Conditon: | Notebook |
| Highlight: | laptop chips,mobile processor laptop |
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Laptop CPU Procesors Core I7-4510U SR1EB , I7 Series (4MB Cache , up to 3.1GHz ) - Notebook CPU
Core i7-4510U is an ULV (ultra low voltage) dual-core processor for ultrabooks launched in Q2 2014. It is based on the Haswell architecture and is manufactured in 22nm. Due to Hyper-Threading, the two cores can handle up to four threads in parallel, leading to better utilization of the CPU. Each core offers a base speed of 2.0 GHz, but can dynamically increase clock rates with Turbo Boost up to 3.1 GHz for 1 active core or 2.8 GHz for 2 active cores. That's 100 - 200 MHz more than the i7-4500U (1.8 - 3.0 GHz).
| Processor number | i7-4510U |
| Family | Core i7 Mobile |
| Technology (micron) | 0.022 |
| Processor speed (GHz) | 2 |
| L2 cache size (KB) | 512 |
| L3 cache size (MB) | 4 |
| The number of cores4 | 2 |
| EM64T | Supported |
| HyperThreading technology | Supported |
| Virtualization technology | Supported |
| Enhanced SpeedStep technology | Supported |
| Execute-Disable bit feature | Supported |
General Information:
| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family |
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| Model number |
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| Frequency | 2000 MHz |
| Maximum turbo frequency | 3100 MHz (1 core) 2800 MHz (2 cores) |
| Bus speed | 5 GT/s DMI |
| Clock multiplier | 20 |
| Package | 1168-ball micro-FCBGA package (FCBGA1168) |
| Socket | BGA1168 |
| Size | 1.57" x 0.94" / 4cm x 2.4cm |
| Introduction date | April 14, 2014 |
| End-of-Life date | Last order date for tray processors is September 30, 2016 Last shipment date for tray processors is March 11, 2017 |
Architecture Microarchiteture:
| Microarchitecture | Haswell |
| Platform | Shark Bay |
| Processor core | Haswell |
| Core stepping | D0 (SR1EB) |
| Manufacturing process | 0.022 micron 0.96 billion transistors |
| Die | 131mm2 |
| Data width | 64 bit |
| The number of CPU cores | 2 |
| The number of threads | 4 |
| Floating Point Unit | Integrated |
| Level 1 cache size | 2 x 32 KB 8-way set associative instruction caches 2 x 32 KB 8-way set associative data caches |
| Level 2 cache size | 2 x 256 KB 8-way set associative caches |
| Level 3 cache size | 4 MB 16-way set associative shared cache |
| Physical memory | 16 GB |
| Multiprocessing | Uniprocessor |
| Extensions and Technologies |
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| Low power features | Enhanced SpeedStep technology |
Intergrated Peripherals/Components:
| Integrated graphics | GPU Type: HD 4400 Graphics tier: GT2 Microarchitecture: Gen 7.5 Execution units: 20 Base frequency (MHz): 200 Maximum frequency (MHz): 1100 The number of supported displays: 3 |
| Memory controller | The number of controllers: 1 Memory channels: 2 Supported memory: DDR3L-1333, DDR3L-1600, LPDDR3-1333, LPDDR3-1600 Maximum memory bandwidth (GB/s): 25.6 |
| Other peripherals |
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Eletrical/Thermal Parameters:
| Maximum operating temperature | 100°C |
| Thermal Design Power | 45 Watt |