Integrity management, solidarity and mutual help, innovation and change, pragmatism and efficiency.

Home
Products
About Us
Factory Tour
Quality Control
Contact Us
Request A Quote
Home ProductsDRAM Memory Chip

H5TQ4G63CFR-RDC Dram Memory Chip 256MX16 CMOS PBGA96 Surface Mount High Efficiency

Good quality Laptop CPU Processors for sales
Good supplier and good quality. Hope we can cooperate next time!

—— Samual-Delke Technology

all the parts are good. thank you.

—— Пантелеев Валера

the parts 100% new ! Super !

—— 정훈 공-Kong

the CPU, CHIPSET are good qulity and good price.

—— Henry Tan

I'm Online Chat Now

H5TQ4G63CFR-RDC Dram Memory Chip 256MX16 CMOS PBGA96 Surface Mount High Efficiency

China H5TQ4G63CFR-RDC  Dram Memory Chip 256MX16 CMOS PBGA96  Surface Mount High Efficiency supplier

Large Image :  H5TQ4G63CFR-RDC Dram Memory Chip 256MX16 CMOS PBGA96 Surface Mount High Efficiency

Product Details:

Place of Origin: Korea
Brand Name: SK HYNIX
Certification: ORIGINAL PARTS
Model Number: H5TQ4G63CFR-RDC

Payment & Shipping Terms:

Minimum Order Quantity: 1 package
Price: Negotiation
Packaging Details: tray package, 1600/box
Delivery Time: 3-5 work days
Payment Terms: T/T, PayPal, Western Union, Escrow and others
Supply Ability: 10K per month
Contact Now
Detailed Product Description
ITEM NO.: H5TQ4G63CFR-RDC Memory IC Type: DDR DRAM
Access Mode: MULTI BANK PAGE BURST Package: R-PBGA-B96
Memory Width: 16 Mounting: Surface Mount

Dram Memory Chip H5TQ4G63CFR-RDC DDR DRAM, 256MX16, CMOS, PBGA96
 
The H5TQ4G63 is a 4,294,967,296-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 4Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
 

Features

  • VDD=VDDQ=1.5V +/- 0.075V
  • Fully differential clock inputs (CK, CK) operation
  • Differential Data Strobe (DQS, DQS)
  • On chip DLL align DQ, DQS and DQS transition with CK transition
  • DM masks write data-in at the both rising and falling edges of the data strobe
  • All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
  • Programmable CAS latency 5, 6, 7, 8, 9, 10, 11, 13 and 14 supported
  • Programmable additive latency 0, CL-1, and CL-2 supported
  • Programmable CAS Write latency (CWL) = 5, 6, 7, 8 9 and 10
  • Programmable burst length 4/8 with both nibble sequential and interleave mode
  • BL switch on the fly
  • 8banks
  • Average Refresh Cycle (Tcase of 0°C~ 95°C)
    • 7.8 µs at 0°C ~ 85°C
    • 3.9 µs at 85°C ~ 95°C Commercial Temperature( 0°C ~ 95°C) Industrial Temperature( -40°C ~ 95°C)
  • JEDEC standard 78ball FBGA(x8), 96ball FBGA (x16)
  • Driver strength selected by EMRS
  • Dynamic On Die Termination supported
  • Asynchronous RESET pin supported
  • ZQ calibration supported
  • TDQS (Termination Data Strobe) supported (x8 only)
  • Write Levelization supported
  • 8 bit pre-fetch

Technical Attributes

 
 
 
 
 

ECCN / UNSPSC

 
 

Contact Details
TAISHENG INT'L TECHNOLOGY(HK) LIMITED

Contact Person: Sales Manager

Send your inquiry directly to us (0 / 3000)